Jonathan Zhang 15fc45982b soc/intel/xeon_sp/spr: Add header files and romstage code ... Several FSP HOBs processing codes are similar to Intel Cooperlake-SP codes in soc/intel/xeon_sp/cpx. Register datasheet please reference Sapphire Rapids EDS Vol2 Doc#612246 and Emmitsburg PCH EDS Doc#606161. Change-Id: Ia022534e5206dbeec946d3e5f3c66bcb5628748f Signed-off-by: Jonathan Zhang <jonzhang@meta.com> Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72442 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>		2023-03-19 09:49:03 +00:00
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alderlake	soc/intel/alderlake: Hook the VT-d DMA protection option	2023-03-17 13:54:34 +00:00
apollolake	soc/intel: Use common codeflow for MP init	2023-02-23 08:53:38 +00:00
baytrail	arch/x86/include/cpu: introduce CPU_TABLE_END CPU table terminator	2023-02-09 16:54:11 +00:00
braswell	treewide: Remove unuseful "_ADR: Address" comment	2023-02-17 15:41:37 +00:00
broadwell	soc/intel/broadwell/gma: don't unconditionally remap all GPU PCI IDs	2023-03-09 16:57:07 +00:00
cannonlake	soc/intel/coffeelake: Select X86_CLFLUSH_CAR config	2023-03-15 14:25:21 +00:00
common	intelblocks/vtd: Add VT-d block with DMA protection API	2023-03-17 13:53:53 +00:00
denverton_ns	arch/x86/include/cpu: introduce CPU_TABLE_END CPU table terminator	2023-02-09 16:54:11 +00:00
elkhartlake	soc/intel/elkhartlake: Select X86_CLFLUSH_CAR config	2023-03-15 14:44:02 +00:00
jasperlake	soc/intel/jsl: Select CSE defined ME spec version for jasperlake	2023-02-24 11:56:38 +00:00
meteorlake	soc/intel/mtl: Choose serial msg log_level based on DIMM count	2023-03-19 07:17:23 +00:00
quark	tree: Move 'asmlinkage' before type 'void'	2023-02-27 00:34:18 +00:00
skylake	soc/intel: Use common codeflow for MP init	2023-02-23 08:53:38 +00:00
tigerlake	soc/intel/tigerlake: Select X86_CLFLUSH_CAR config	2023-03-15 14:44:24 +00:00
xeon_sp	soc/intel/xeon_sp/spr: Add header files and romstage code	2023-03-19 09:49:03 +00:00
Makefile.inc