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John Zhao 18a730d588 mb/google/volteer: Configure Voxel USB2 ports for Type C 
Two USB2 ports 4 and 9 are assigned to type C connectors on Voxel board.
This update configures these USB2 ports for Type C which will allow USB2
port reset message upstream from PCH to CPU to recover a USB3 device
that downgraded to USB2 to upgrade back to USB3.

BUG=b:176575892
TEST=Booted to kernel on Voxel board and verified usb2 port reset
message enable bits through pch xhci_mmio_base + R_XHCI_MEM_U2PRM_U2PRDE
where the offset register R_XHCI_MEM_U2PRM_U2PRDE has value 0x92f4.
Validated various USB3 devices enumeration.

Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: Ia370a449a41701e690c1c507d70bedfce2076a65
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49053
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.corp-partner.google.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
 		2021-01-12 18:14:35 +00:00
3rdparty amd_blobs: Advance pointer for picasso FSP 0x25 2021-01-08 15:18:07 +00:00
Documentation Documentation: Fix toctree and remove dead links 2021-01-12 13:36:36 +00:00
LICENSES drivers: Use SPDX identifiers 2020-05-25 22:19:21 +00:00
configs configs: Add a weird config for Asus P8Z77-V LX2 2020-12-14 21:01:17 +00:00
payloads libpayload/lpgcc: Drop redundant linker path 2021-01-11 23:33:03 +00:00
src mb/google/volteer: Configure Voxel USB2 ports for Type C 2021-01-12 18:14:35 +00:00
tests device: Use __pci_0_00_0_config in config_of_soc() 2021-01-12 05:22:40 +00:00
util util/ifdtool: Add coreboot build system support 2021-01-12 14:43:26 +00:00
.checkpatch.conf
…
.clang-format
…
.editorconfig
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.gitignore .gitignore: Ignore .test/.dependencies globally 2020-10-31 18:21:36 +00:00
.gitmodules 3rdparty: Add STM as a submodule 2020-09-30 10:17:03 +00:00
.gitreview
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AUTHORS AUTHORS, util/: Drop individual copyright notices 2020-05-09 21:21:32 +00:00
COPYING
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MAINTAINERS MAINTAINERS: Add maintainer for ACPI 2021-01-04 23:13:18 +00:00
Makefile Makefile: Add $(xcompile) to specify where to write xcompile 2020-12-23 03:40:35 +00:00
Makefile.inc util/ifdtool: Add coreboot build system support 2021-01-12 14:43:26 +00:00
README.md
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gnat.adc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
toolchain.inc Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.