coreboot-kgpe-d16/src
Christian Walter 199f98bc43 superio/common/generic: Assign resources behind device
If multiple devices are behind a dev, we would only recognise port 0. We
need to scan the complete 'bus'.

Tested on ASpeed AST2500

Change-Id: Id80a2ae6e82c151b8d8adc9c5f35f38362d538fa
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37607
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-12 12:46:35 +00:00
..
acpi
arch printf: Automatically prefix %p with 0x 2019-12-11 11:38:59 +00:00
commonlib printf: Automatically prefix %p with 0x 2019-12-11 11:38:59 +00:00
console printf: Automatically prefix %p with 0x 2019-12-11 11:38:59 +00:00
cpu AGESA, binaryPI: implement C bootblock 2019-12-11 22:47:10 +00:00
device printf: Automatically prefix %p with 0x 2019-12-11 11:38:59 +00:00
drivers AGESA, binaryPI: implement C bootblock 2019-12-11 22:47:10 +00:00
ec ec/google/wilco: Add EC ACPI methods for privacy screen 2019-12-02 23:28:03 +00:00
include fmap: Make FMAP_CACHE mandatory if it is configured in 2019-12-11 11:42:26 +00:00
lib fmap: Make FMAP_CACHE mandatory if it is configured in 2019-12-11 11:42:26 +00:00
mainboard hp/pavilion_m6_1035dx: Switch away from ROMCC_BOOTBLOCK 2019-12-12 11:53:51 +00:00
northbridge mainboard/(i945,ich7): Remove commented RCBA32(0x341c) code 2019-12-10 11:16:07 +00:00
security vboot: remove old vboot_fill_handoff function header 2019-12-10 11:20:21 +00:00
soc fmap: Make FMAP_CACHE mandatory if it is configured in 2019-12-11 11:42:26 +00:00
southbridge sb/amd/{agesa,pi}/hudson: Explicitly enable LPC controller 2019-12-10 11:17:40 +00:00
superio superio/common/generic: Assign resources behind device 2019-12-12 12:46:35 +00:00
vendorcode soc/amd/stoneyridge|mbs: Deprecate SOC_AMD_NAME_PKG and others 2019-12-11 11:41:26 +00:00
Kconfig Kconfig: Drop NO_RELOCATABLE_RAMSTAGE 2019-12-09 17:02:16 +00:00