coreboot-kgpe-d16/src/soc
Sumeet R Pawnikar 1a62150709 soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU
Set power limits in devicetree for Tiger Lake Y-SKU based volteer
variant boards.

BUG=b:152639350
BRANCH=None
TEST=Built and tested power limits on volteer variant board.

Change-Id: If4f1226473b48365e5962df9fff29910c99007fc
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43607
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-25 00:07:36 +00:00
..
amd soc/amd/picasso: mark usb2_phy_tune struct as packed 2020-07-24 23:55:57 +00:00
cavium src: Remove unused 'include <types.h>' 2020-07-14 16:10:17 +00:00
intel soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU 2020-07-25 00:07:36 +00:00
mediatek src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
nvidia src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
qualcomm src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
rockchip soc/rockchip/rk3399/display.c: Add missing include 2020-07-14 16:11:42 +00:00
samsung soc/samsung/exynos5420: Drop dead code 2020-07-09 21:37:01 +00:00
sifive treewide: Add Kconfig variable MEMLAYOUT_LD_FILE 2020-06-13 06:49:23 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00