1c37157218
This patch removes the recently added update8/16/32/64() API and replaces it with clrsetbits8/16/32/64(). This is more in line with the existing endian-specific clrsetbits_le16/32/64() functions that have been used for this task on some platforms already. Rename clrsetbits_8() to clrsetbits8() to be in line with the new naming. Keep this stuff in <device/mmio.h> and get rid of <mmio.h> again because having both is confusing and we seem to have been standardizing on <device/mmio.h> as the standard arch-independent header that all platforms should include already. Also sync libpayload back up with what we have in coreboot. (I'm the original author of the clrsetbits_le32-definitions so I'm relicensing them to BSD here.) Change-Id: Ie4f7b9fdbdf9e8c0174427b4288f79006d56978b Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37432 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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.. | ||
dram | ||
azalia.h | ||
azalia_device.h | ||
cardbus.h | ||
device.h | ||
drm_dp_helper.h | ||
early_smbus.h | ||
hypertransport.h | ||
hypertransport_def.h | ||
i2c.h | ||
i2c_bus.h | ||
i2c_simple.h | ||
mmio.h | ||
path.h | ||
pci.h | ||
pci_def.h | ||
pci_ehci.h | ||
pci_ids.h | ||
pci_mmio_cfg.h | ||
pci_ops.h | ||
pci_rom.h | ||
pci_type.h | ||
pciexp.h | ||
pcix.h | ||
pnp.h | ||
pnp_def.h | ||
pnp_ops.h | ||
pnp_type.h | ||
resource.h | ||
smbus.h | ||
smbus_def.h | ||
spi.h |