3de303179a
pci_bus_default_ops() is the default anyway. Change-Id: I5306d3feea3fc583171d8c865abbe0864b6d9cc6 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/26055 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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.. | ||
bootblock | ||
include/soc | ||
romstage | ||
acpi.c | ||
chip.c | ||
chip.h | ||
ehci.c | ||
fsp1_1.c | ||
fsp2_0.c | ||
gpio_i2c.c | ||
i2c.c | ||
Kconfig | ||
lpc.c | ||
Makefile.inc | ||
memmap.c | ||
northcluster.c | ||
reg_access.c | ||
reset.c | ||
sd.c | ||
spi.c | ||
spi_debug.c | ||
storage_test.c | ||
tsc_freq.c | ||
uart.c | ||
uart_common.c |