coreboot-kgpe-d16/src
Ivy Jian 1d17529954 mb/google/deltaur: Update USB/WWAN config
Update USB3 ports configuration as schematics design.

BUG=b:155026295
TEST=Boot into OS and check WWAN device detected by lsusb.

Signed-off-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Change-Id: Icb938e5a9c05fcc9772219b081a6f05334261baf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40818
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-01 06:55:55 +00:00
..
acpi
arch acpi_device: Make integer array input variable const 2020-05-01 06:54:51 +00:00
commonlib rules.h: Rename ENV_VERSTAGE to ENV_SEPARATE_VERSTAGE 2020-04-23 01:21:56 +00:00
console drivers/pc80/rtc: Drop CMOS_POST_EXTRA option 2020-04-20 06:13:39 +00:00
cpu src: Remove unused 'include <cpu/x86/cache.h>' 2020-05-01 06:10:49 +00:00
device device: Constify struct device * parameter to acpi_fill_ssdt() 2020-04-28 19:50:26 +00:00
drivers src: Remove not used 'include <smbios.h>' 2020-05-01 06:16:33 +00:00
ec device: Constify struct device * parameter to acpi_fill_ssdt() 2020-04-28 19:50:26 +00:00
include include/device/device.h: Include <smbios.h> 2020-05-01 06:15:57 +00:00
lib rules.h: Rename ENV_VERSTAGE to ENV_SEPARATE_VERSTAGE 2020-04-23 01:21:56 +00:00
mainboard mb/google/deltaur: Update USB/WWAN config 2020-05-01 06:55:55 +00:00
northbridge src: Remove unused 'include <cpu/x86/cache.h>' 2020-05-01 06:10:49 +00:00
security security/vboot: Convert reboot-related errors to vboot2-style 2020-05-01 06:27:56 +00:00
soc soc/intel/jasperlake: fix args of dimm_info_fill() for dram_part_num 2020-05-01 06:52:48 +00:00
southbridge sb/common/smihandler: Fix 16-bit read/write to PCI_COMMAND register 2020-05-01 06:25:57 +00:00
superio superio/aspeed/common: Add early configure functions 2020-04-29 16:06:02 +00:00
vendorcode vc/eltan/security/verified_boot/vboot_check.c: Increase wb_buffer size 2020-05-01 06:38:37 +00:00
Kconfig src/Kconfig: enable USE_BLOBS by default 2020-04-14 10:03:55 +00:00