coreboot-kgpe-d16/src/soc/intel/braswell/memmap.c
Arthur Heymans 340e4b8090 lib/cbmem_top: Add a common cbmem_top implementation
This adds a common cbmem_top implementation to all coreboot target.

In romstage a static variable will be used to cache the result of
cbmem_top_romstage.

In ramstage if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is set a global variable
needs to be populated by the stage entry with the value passed via the
calling arguments. if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is not set the
same implementation as will be used as in romstage.

Change-Id: Ie767542ee25483acc9a56785ce20a885e9a63098
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-01 11:44:51 +00:00

71 lines
2.2 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Google, Inc.
* Copyright (C) 2015-2016 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <cbmem.h>
#include <cpu/x86/smm.h>
#include <soc/iosf.h>
static size_t smm_region_size(void)
{
u32 smm_size;
smm_size = iosf_bunit_read(BUNIT_SMRRH) & 0xFFFF;
smm_size -= iosf_bunit_read(BUNIT_SMRRL) & 0xFFFF;
smm_size = (smm_size + 1) << 20;
return smm_size;
}
void smm_region(uintptr_t *start, size_t *size)
{
*start = (iosf_bunit_read(BUNIT_SMRRL) & 0xFFFF) << 20;
*size = smm_region_size();
}
void *cbmem_top_chipset(void)
{
uintptr_t smm_base;
size_t smm_size;
/*
* +-------------------------+ Top of RAM (aligned)
* | System Management Mode |
* | code and data | Length: CONFIG_TSEG_SIZE
* | (TSEG) |
* +-------------------------+ SMM base (aligned)
* | |
* | Chipset Reserved Memory | Length: Multiple of CONFIG_TSEG_SIZE
* | |
* +-------------------------+ top_of_ram (aligned)
* | |
* | CBMEM Root |
* | |
* +-------------------------+
* | |
* | FSP Reserved Memory |
* | |
* +-------------------------+
* | |
* | Various CBMEM Entries |
* | |
* +-------------------------+ top_of_stack (8 byte aligned)
* | |
* | stack (CBMEM Entry) |
* | |
* +-------------------------+
*/
smm_region(&smm_base, &smm_size);
return (void *)smm_base;
}