340e4b8090
This adds a common cbmem_top implementation to all coreboot target. In romstage a static variable will be used to cache the result of cbmem_top_romstage. In ramstage if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is set a global variable needs to be populated by the stage entry with the value passed via the calling arguments. if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is not set the same implementation as will be used as in romstage. Change-Id: Ie767542ee25483acc9a56785ce20a885e9a63098 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36273 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
71 lines
2.2 KiB
C
71 lines
2.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google, Inc.
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* Copyright (C) 2015-2016 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cbmem.h>
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#include <cpu/x86/smm.h>
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#include <soc/iosf.h>
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static size_t smm_region_size(void)
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{
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u32 smm_size;
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smm_size = iosf_bunit_read(BUNIT_SMRRH) & 0xFFFF;
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smm_size -= iosf_bunit_read(BUNIT_SMRRL) & 0xFFFF;
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smm_size = (smm_size + 1) << 20;
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return smm_size;
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}
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void smm_region(uintptr_t *start, size_t *size)
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{
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*start = (iosf_bunit_read(BUNIT_SMRRL) & 0xFFFF) << 20;
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*size = smm_region_size();
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}
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void *cbmem_top_chipset(void)
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{
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uintptr_t smm_base;
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size_t smm_size;
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/*
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* +-------------------------+ Top of RAM (aligned)
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* | System Management Mode |
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* | code and data | Length: CONFIG_TSEG_SIZE
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* | (TSEG) |
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* +-------------------------+ SMM base (aligned)
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* | |
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* | Chipset Reserved Memory | Length: Multiple of CONFIG_TSEG_SIZE
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* | |
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* +-------------------------+ top_of_ram (aligned)
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* | |
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* | CBMEM Root |
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* | |
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* +-------------------------+
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* | |
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* | FSP Reserved Memory |
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* | |
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* +-------------------------+
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* | |
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* | Various CBMEM Entries |
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* | |
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* +-------------------------+ top_of_stack (8 byte aligned)
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* | |
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* | stack (CBMEM Entry) |
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* | |
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* +-------------------------+
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*/
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smm_region(&smm_base, &smm_size);
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return (void *)smm_base;
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}
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