1f0569f01c
This patch adds a new "backlight" output GPIO to the coreboot table in order to avoid redundantly defining that GPIO in the payload. BRANCH=veyron BUG=chrome-os-partner:34713 TEST=Tested together with corresponding depthcharge CL. Change-Id: Ia997beb1a400136ad65d8f0217781c9782f6e8a5 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 04ce4c23573cf926aeef3d817d3ab00835f897c7 Original-Change-Id: I69b3c7ac6be4b9723b6a0dfecef5e1c4ea681aff Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/242400 Original-Tested-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9652 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc.jones@se-eng.com> |
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.. | ||
sdram_inf | ||
board.h | ||
boardid.c | ||
bootblock.c | ||
chromeos.c | ||
devicetree.cb | ||
Kconfig | ||
mainboard.c | ||
Makefile.inc | ||
memlayout.ld | ||
reset.c | ||
romstage.c | ||
sdram_configs.c |