coreboot-kgpe-d16/src
Nico Huber 21707cc29d sio/acpi: Add more magic bytes to ENTER/EXIT_CONFIG_MODE
ITE super-i/o chips need a fourth byte and have a special register
to exit config mode.

Change-Id: Ic40873649d567b87d3a937f2bf068649e67715de
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/17286
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2016-12-07 20:01:50 +01:00
..
acpi
arch PCI ops: MMCONF_SUPPORT_DEFAULT is required 2016-12-07 12:59:28 +01:00
commonlib soc/intel/common: Add suppport for Extended VBT 2016-12-02 21:51:01 +01:00
console Hook up libhwbase in ramstage 2016-11-29 23:45:40 +01:00
cpu MMCONF_SUPPORT: Flip default to enabled 2016-12-07 13:00:31 +01:00
device MMCONF_SUPPORT: Consolidate resource registration 2016-12-07 13:00:56 +01:00
drivers spi_flash: Make a deep copy of spi_slave structure 2016-12-06 07:17:28 +01:00
ec sio/acpi: Add more magic bytes to ENTER/EXIT_CONFIG_MODE 2016-12-07 20:01:50 +01:00
include MMCONF_SUPPORT: Consolidate resource registration 2016-12-07 13:00:56 +01:00
lib lib/nhlt: add support for setting the oem_revision 2016-12-01 08:17:42 +01:00
mainboard MMCONF_SUPPORT: Flip default to enabled 2016-12-07 13:00:31 +01:00
northbridge AMD fam10 binaryPI: Remove invalid PCI ops on CPU domain 2016-12-07 13:05:48 +01:00
soc soc/mediatek/mt8173: Do not initialize static variables to 0 2016-12-07 17:15:56 +01:00
southbridge PCI ops: MMCONF_SUPPORT_DEFAULT is required 2016-12-07 12:59:28 +01:00
superio sio/acpi: Add more magic bytes to ENTER/EXIT_CONFIG_MODE 2016-12-07 20:01:50 +01:00
vboot
vendorcode vendorcode/siemens: Ensure a given info block is available for a field 2016-12-06 09:59:11 +01:00
Kconfig PCI ops: MMCONF_SUPPORT_DEFAULT is required 2016-12-07 12:59:28 +01:00