Go to file
Felix Held 21a8e381ea util/amdfwtool: use table-relative addressing in ISH case
When the image slot header (ISH) is used, the addresses in the PSP and
BIOS directory tables need to be relative to the beginning of the table.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia61f7c8313d5a1af95c68b9177a53a2f5443552a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63183
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-03-30 22:20:04 +00:00
3rdparty Update blobs submodule to upstream master 2022-03-24 17:20:58 +00:00
Documentation Documentation: gpio: Provide minor fixes to the table 2022-03-30 07:19:00 +00:00
LICENSES
configs src/mainboard/emulation/qemu-power9/*: add QEMU POWER9 mainboard 2022-02-11 20:14:55 +00:00
payloads commonlib/bsd/helpers: Remove redundancy with libpayload defines 2022-03-30 21:21:47 +00:00
spd spd/lp5: Add new part MT62F2G32D8DR-031 2022-03-10 15:16:52 +00:00
src ChromeoS: Retain ACPI CNVS contents on S3 resume 2022-03-30 21:43:00 +00:00
tests tests/lib: Add space before single line comment termination 2022-03-27 15:33:39 +00:00
util util/amdfwtool: use table-relative addressing in ISH case 2022-03-30 22:20:04 +00:00
.checkpatch.conf lint: checkpatch: Only exclude specific src/vendorcode/ subdirectories 2021-04-06 16:04:41 +00:00
.clang-format
.editorconfig
.gitignore
.gitmodules .gitmodules: Update intel-microcode submodule to track branch=main 2021-06-09 17:20:50 +00:00
.gitreview
.mailmap .mailmap: Add a .mailmap file for git 2022-03-08 18:53:47 +00:00
AUTHORS
COPYING
MAINTAINERS MAINTAINERS: Remove myself 2022-03-14 15:53:10 +00:00
Makefile Makefile: Add .SECONDARY 2022-02-28 22:00:42 +00:00
Makefile.inc Makefile.inc: Explicitly delete coreboot.pre 2022-03-30 07:18:06 +00:00
README.md
gnat.adc
toolchain.inc build system: immediately report what users are supposed to look into 2021-10-18 16:39:25 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.