coreboot-kgpe-d16/src/soc/intel/skylake/include
Subrata Banik 7e9cb92815 soc/intel/skylake: Add support for all UART port index
Select LPSS UART Base address based on LPSS UART port index.

Change-Id: I306d3d299f8d6a890ae519c74008f9d0d9dd1a76
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20997
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-08-21 16:29:55 +00:00
..
fsp11/soc soc/intel/skylake: Use common opregion implementation 2017-07-24 16:48:30 +00:00
fsp20/soc soc/intel/skylake: Clean up code by using common FAST_SPI module 2017-05-02 18:26:07 +02:00
soc soc/intel/skylake: Add support for all UART port index 2017-08-21 16:29:55 +00:00