Felix Held 2421de6701 soc/amd/cezanne: factor out UPD-M configuration from romstage ... Move the parts of romstage.c that populate the UPD-M data structure to the newly created fsp_m_params.c file. Since platform_fsp_memory_init_params_cb gets called from the FSP driver and not directly from car_stage_entry the two code parts in romstage.c weren't directly interacting. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I1f7f5879ac318372042ff703ebbe584ce1c32c91 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51835 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2021-03-29 19:52:22 +00:00
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amd	soc/amd/cezanne: factor out UPD-M configuration from romstage	2021-03-29 19:52:22 +00:00
cavium
example
intel	soc/intel/alderlake: add processor power limits control support	2021-03-28 16:08:02 +00:00
mediatek	soc/mediatek: Adjust hsa, hbp, hfp packets for MIPI_DSI_MODE_LINE_END	2021-03-27 10:03:41 +00:00
nvidia	cbfs: Replace more instances of cbfs_boot_locate() with newer APIs	2021-03-17 08:10:20 +00:00
qualcomm	cbfs: Remove prog_locate() for payloads (SELF and FIT)	2021-03-17 00:13:53 +00:00
rockchip	soc/rockchip/rk3399/sdram: Add channel to error message	2021-03-04 01:22:10 +00:00
samsung	cbfs: Pull handling of the CBFS_CACHE mem_pool into CBFS core	2021-03-08 22:31:29 +00:00
sifive	memlayout: Store region sizes as separate symbols	2021-02-19 08:39:26 +00:00
ti	soc/ti/am335x/header.c: Add missing include	2021-02-03 08:55:15 +00:00
ucb