Arthur Heymans a8a9f34e9b sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables ... Both southbridges need to be done at once since this southbridge code is used for different northbridges, which fails to compile when done separately. This needs an acpi_name functions in the northbridge code to be defined. TESTED on Intel DG43GT: show correct PIRQ ACPI entries in /sys/firmware/acpi/tables/SSDT. Change-Id: I286d251ddf8fcae27dd07011a1cd62d8f4847683 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22981 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2018-06-29 07:45:30 +00:00
..
acpi	sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables	2018-06-29 07:45:30 +00:00
acpi_tables.c	mb/*/*/acpi_tables.c: Remove unneeded includes	2018-06-11 08:52:53 +00:00
board_info.txt
cmos.default
cmos.layout	nb/intel/x4x: Change memory layout to improve MTRR	2018-05-01 17:42:30 +00:00
cstates.c
data.vbt	mb/*/*: Add a few VBT files	2018-06-06 14:58:21 +00:00
devicetree.cb	mb/gigabyte: Get rid of whitespace before tab	2018-06-04 09:00:32 +00:00
dsdt.asl
gma-mainboard.ads	mb/*/*: Enable libgfxinit on x4x boards	2018-06-14 09:40:20 +00:00
gpio.c
hda_verb.c
Kconfig	nb/intel/x4x: Deprecate native graphic init	2018-06-14 09:40:55 +00:00
Kconfig.name
Makefile.inc	mb/*/*: Enable libgfxinit on x4x boards	2018-06-14 09:40:20 +00:00
romstage.c	mb/*/*/romstage.c: Clean up targets with i82801gx	2018-01-14 21:43:25 +00:00