coreboot-kgpe-d16/src/soc
praveen hodagatta pranesh 521e48c87d soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
- CNL PCH-H has 12 GPIO groups which are grouped under 5 gpio communities.

- Add gpio pin definitions for CNP-H and related changes.

- Add gpio device name, host software ownership reg offset for CNP-H.

BUG: none
TEST: build and flash, boot to windows and yocto os on both CFL RVP8 &
      RVP11 and verify power management, IO device functionalities
      work fine.

Change-Id: I496ec059de125b97c646581bbd3b8bfe6ffa641e
Signed-off-by: praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com>
Reviewed-on: https://review.coreboot.org/28890
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-10-17 12:16:47 +00:00
..
amd soc/amd/stoneyridge: Define PM USB Enable register 2018-10-14 19:11:54 +00:00
broadcom soc/broadcom/cygnus: Increase romstage SRAM size in memlayout 2018-08-13 12:16:32 +00:00
cavium soc/cavium/cn81xx: Drop dead do_soft_reset() implementation 2018-10-17 12:02:35 +00:00
imgtec src: Use tabs for indentation 2018-10-08 09:46:16 +00:00
intel soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions 2018-10-17 12:16:47 +00:00
lowrisc/lowrisc mb/lowrisc: Remove the Nexys4DDR port 2018-09-26 15:36:40 +00:00
mediatek mediatek/mt8183: Add USB support 2018-10-17 12:05:39 +00:00
nvidia tegra124_lp0: make sure to build with compiler.h included 2018-10-11 11:00:49 +00:00
qualcomm Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00
rockchip drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
samsung Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00
sifive soc/sifive/fu540: Document #if ENV_ROMSTAGE line 2018-09-26 18:52:54 +00:00
ucb arch/riscv: provide a monotonic timer 2018-09-14 09:28:06 +00:00