coreboot-kgpe-d16/src/northbridge/amd
zbao f72237346d S3 code in coreboot public folder.
1. Move the Stack to high memory.
2. Restore the MTRR before Coreboot jump to the wakeup vector.

Change-Id: I9872e02fcd7eed98e7f630aa29ece810ac32d55a
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/623
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-04-16 18:22:47 +02:00
..
agesa S3 code in coreboot public folder. 2012-04-16 18:22:47 +02:00
amdfam10 amdfam10: add phenom II as known cpu 2012-04-05 23:12:24 +02:00
amdht remove trailing whitespace 2011-11-01 19:07:45 +01:00
amdk8 VIA southbridge K8T890: Apply un-written naming rules 2012-03-16 19:45:47 +01:00
amdmct Fix ECC disable option for AMD Fam10 DDR2 and DDR3. 2012-03-02 23:35:26 +01:00
cimx RD890: AMD RD890/SR56X0 CIMX wrapper 2012-02-16 19:35:09 +01:00
gx1 Unify use of post_code 2011-04-11 20:17:22 +00:00
gx2 Remove whitespace. 2012-02-17 19:04:31 +01:00
lx Mark non-returning function as noreturn to help some compiler versions 2011-03-01 07:30:14 +00:00
Kconfig RD890: AMD RD890/SR56X0 CIMX wrapper 2012-02-16 19:35:09 +01:00
Makefile.inc Fix AMD Agesa leaking Kconfig 2012-03-16 22:39:09 +01:00