coreboot-kgpe-d16/src/soc/intel/alderlake/acpi/serialio.asl
Subrata Banik 0808992441 soc/intel/alderlake/acpi: Add SoC ACPI directory for ADL
List of changes:
1. Select common ACPI Kconfig to include common ACPI code block
from IA-common code
2. Select ACPI Kconfig support for wake up from sleep states.
3. Add SoC ASL code in ASL 2.0 syntax for SoC IPs like IPU, ISH,
LAN, HDA etc.

Change-Id: I7509e8c46038b1edfc501db74e763f198efb56ab
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45972
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-06 12:29:58 +00:00

81 lines
1.2 KiB
Text

/* SPDX-License-Identifier: GPL-2.0-only */
/* Intel Serial IO Devices */
Device (I2C0)
{
Name (_ADR, 0x00150000)
Name (_DDN, "Serial IO I2C Controller 0")
}
Device (I2C1)
{
Name (_ADR, 0x00150001)
Name (_DDN, "Serial IO I2C Controller 1")
}
Device (I2C2)
{
Name (_ADR, 0x00150002)
Name (_DDN, "Serial IO I2C Controller 2")
}
Device (I2C3)
{
Name (_ADR, 0x00150003)
Name (_DDN, "Serial IO I2C Controller 3")
}
Device (I2C4)
{
Name (_ADR, 0x00190000)
Name (_DDN, "Serial IO I2C Controller 4")
}
Device (I2C5)
{
Name (_ADR, 0x00190001)
Name (_DDN, "Serial IO I2C Controller 5")
}
Device (SPI0)
{
Name (_ADR, 0x001e0002)
Name (_DDN, "Serial IO SPI Controller 0")
}
Device (SPI1)
{
Name (_ADR, 0x001e0003)
Name (_DDN, "Serial IO SPI Controller 1")
}
Device (SPI2)
{
Name (_ADR, 0x00120006)
Name (_DDN, "Serial IO SPI Controller 2")
}
Device (SPI3)
{
Name (_ADR, 0x00130000)
Name (_DDN, "Serial IO SPI Controller 3")
}
Device (UAR0)
{
Name (_ADR, 0x001e0000)
Name (_DDN, "Serial IO UART Controller 0")
}
Device (UAR1)
{
Name (_ADR, 0x001e0001)
Name (_DDN, "Serial IO UART Controller 1")
}
Device (UAR2)
{
Name (_ADR, 0x00190002)
Name (_DDN, "Serial IO UART Controller 2")
}