coreboot-kgpe-d16/src/mainboard/asrock/g41c-gs
Subrata Banik 2715cdb3f3 soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi
This patch creates a common instance of sleepstates.asl inside intel common
code (southbridge/intel/common/acpi) and asks all IA CPU/SOC code to
refer sleepstates.asl from common code block.

TEST=Able to build and boot Hatch and ICL DE system. Dump DSDT.asl to verify
S0/S3/S4/S5 entries after booting to OS.

Change-Id: Ie2132189f91211df74f8b5546da63ded4fdf687a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36463
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-01 11:50:03 +00:00
..
acpi coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
variants sb/intel/i82801gx: Detect if the southbridge supports AHCI 2019-06-06 10:38:22 +00:00
acpi_tables.c
board_info.txt
cmos.default
cmos.layout nb/intel/x4x: Use parallel MP init 2019-01-23 14:47:53 +00:00
cstates.c
data.vbt
dsdt.asl soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi 2019-11-01 11:50:03 +00:00
gma-mainboard.ads
hda_verb.c
Kconfig
Kconfig.name
Makefile.inc
romstage.c sb/intel/i82801gx: Move CIR init to a common place 2019-10-11 12:21:25 +00:00