coreboot-kgpe-d16/src/soc
Aaron Durbin 27d153cabc skylake: re-enable PCIe L1 sub states
All boards should have their L1 sub states working now so
re-enable the defaults.

BUG=chrome-os-partner:41861
BRANCH=None
TEST=Built and booted glados into OS. PCIe devices show up still.

Change-Id: Ic040fa108a662e15bb97cf8b0961f0f56683e146
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 380491f8267e60c3c6bc62486aaf21e201fcfd36
Original-Change-Id: Idc6923b1fdd1c20d463eb7782be112f90b9adbfd
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/285170
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/10989
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-21 20:07:03 +02:00
..
broadcom/cygnus Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED() 2015-07-12 18:14:23 +02:00
imgtec/pistachio Remove address from GPLv2 headers 2015-06-24 07:09:24 +02:00
intel skylake: re-enable PCIe L1 sub states 2015-07-21 20:07:03 +02:00
marvell/bg4cd marvel/bg4cd: move timestamp init to SoC code 2015-07-07 20:07:41 +02:00
nvidia t210: new sdram_lp0_save_params() function 2015-07-16 22:39:33 +02:00
qualcomm/ipq806x ipq8064: enable timestamp collection 2015-07-09 00:11:37 +02:00
rockchip/rk3288 rk3288: Fix & vs && mix up in hdmi driver 2015-07-09 00:31:14 +02:00
samsung Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
ucb/riscv Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00