coreboot-kgpe-d16/src
Chris Morgan 2806ec971e nb/intel/haswell: Fix type definition of dev in PCI_FUNC(dev)
The type of dev in the PCI_FUNC(dev) is incorrect. Fix it using
PCI_DEV2DEVFN() macro. Tested on a T440P, and necessary on this board
to enable the dGPU.

Change-Id: I3fb0f677cc98800f355f6af7d3172be3e59ce5c2
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38722
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-02-06 18:10:43 +00:00
..
acpi src/acpi: Update license headers to SPDX 2020-01-02 14:49:00 +00:00
arch arch/x86/include/arch: Add SMM_TASK_STATE_SEG 2020-02-04 18:54:37 +00:00
commonlib commonlib/cbfs.h: Correct spelling error in comment 2020-02-04 16:12:22 +00:00
console console/post: NOPOST means NOPOST 2020-01-18 10:53:08 +00:00
cpu cpu/x86: Put guard around align for smm_save_state_size 2020-02-06 16:19:04 +00:00
device pciexp: Add support for allocating PCI express hotplug resources 2020-02-05 09:32:30 +00:00
drivers drivers/generic/gfx: Add null pointer error check 2020-02-03 16:44:57 +00:00
ec ec/google/wilco: Set cpu id and cores to EC 2020-02-01 19:53:11 +00:00
include security/intel/stm: Add STM support 2020-02-05 18:49:27 +00:00
lib commonlib: Add commonlib/bsd 2020-01-28 06:36:13 +00:00
mainboard mb/pcengines/apu2: use AGESA 1.0.0.4 with adjusted AGESA header 2020-02-06 09:21:48 +00:00
northbridge nb/intel/haswell: Fix type definition of dev in PCI_FUNC(dev) 2020-02-06 18:10:43 +00:00
security security/intel/stm: Add STM support 2020-02-05 18:49:27 +00:00
soc soc/intel: Add get_pmbase 2020-02-04 18:54:01 +00:00
southbridge sb/intel/common/acpi: Add more Windows versions 2020-02-01 19:52:35 +00:00
superio src/superio/*: Fix typos 2020-01-30 13:46:09 +00:00
vendorcode mb/pcengines/apu2: use AGESA 1.0.0.4 with adjusted AGESA header 2020-02-06 09:21:48 +00:00
Kconfig src/Kconfig: Remove unused symbol 2020-01-27 07:41:39 +00:00