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Michał Żygowski 283e5876b5 drivers/crb: Add SMBIOS hook to generate type 43 TPM Device
Example for Alder Lake PTT:

Handle 0x004C, DMI type 43, 31 bytes
TPM Device
	Vendor ID: INTC
	Specification Version: 2.0
	Firmware Revision: 600.18
	Description: Intel iTPM
	Characteristics:
		TPM Device characteristics not supported
	OEM-specific Information: 0x00000000

TEST=Execute dmidecode and see the type 43 is populated with PTT
on MSI PRO Z690-A WIFI DDR4

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I05289f98969bd431017aff1aa77be5806d6f1838
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
2022-09-30 08:21:01 +00:00
3rdparty 3rdparty/opensbi: Update to latest ToT 2022-09-14 20:12:56 +00:00
Documentation Documentation/drivers: Add section for i2c detect feature 2022-09-26 14:21:54 +00:00
LICENSES src/mb: Update unlicensable files with the CC-PDDC SPDX ID 2022-08-13 19:25:12 +00:00
configs configs/config.prodrive_hermes: Fix typo 2022-09-06 17:56:35 +00:00
payloads payloads/external/skiboot/Makefile: fix output on `make clean` 2022-09-28 17:35:37 +00:00
spd util/spd_tools: Change Mendocino to use 0x13 for LP5x memory type 2022-09-29 17:12:00 +00:00
src drivers/crb: Add SMBIOS hook to generate type 43 TPM Device 2022-09-30 08:21:01 +00:00
tests tests: Add support for tests build failures detection 2022-09-21 14:06:42 +00:00
util util/spd_tools: Change Mendocino to use 0x13 for LP5x memory type 2022-09-29 17:12:00 +00:00
.checkpatch.conf checkpatch.conf: Ignore check for pointer comparisons to NULL 2022-09-22 15:13:35 +00:00
.clang-format
.editorconfig Add .editorconfig file 2019-09-10 12:52:18 +00:00
.gitignore .gitignore: Add .vscode/ 2022-08-30 17:56:55 +00:00
.gitmodules Add SBOM (Software Bill of Materials) Generation 2022-08-22 14:48:46 +00:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
.mailmap .mailmap: Add a .mailmap file for git 2022-03-08 18:53:47 +00:00
AUTHORS arm/libgcc: Support signed 64-bit division 2022-08-13 17:20:32 +00:00
COPYING
MAINTAINERS MAINTAINERS: Update AMD maintenance lists 2022-08-25 16:08:09 +00:00
Makefile Makefile: Add util/kconfig/Makefile.real to nocompile list 2022-07-17 22:17:10 +00:00
Makefile.inc Makefile.inc: Fix build hang if file-size is run on empty string 2022-09-06 15:48:53 +00:00
README.md Treewide: Remove doxygen config files and targets 2022-05-28 01:24:51 +00:00
gnat.adc
toolchain.inc build system: immediately report what users are supposed to look into 2021-10-18 16:39:25 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.