coreboot-kgpe-d16/src/soc/amd
Furquan Shaikh 28980fdf85 soc/amd/picasso: Use read-modify-write for ACP_I2S_PIN_CONFIG
This change uses read-modify-write to update ACP_I2S_PIN_CONFIG instead of
a write operation since the other bits in the register are reserved.

Change-Id: Ic64e1907858ec293c5f759e627d19c00d748a30e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43503
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-17 05:04:02 +00:00
..
common soc/amd/common: Don't get eSPI address from PCI if not on x86 2020-07-16 22:20:53 +00:00
picasso soc/amd/picasso: Use read-modify-write for ACP_I2S_PIN_CONFIG 2020-07-17 05:04:02 +00:00
stoneyridge soc/amd/stoneyridge: Remove unused SPI #defines 2020-07-16 17:38:57 +00:00
Kconfig