coreboot-kgpe-d16/src
Martin Roth 2963ae7fd4 northbridge/intel: Add fsp_rangeley northbridge support
This adds the northbridge initialization pieces for Intel's Atom C2000
processor (Formerly Rangeley).  It is intended to be used with the Intel
Atom C2000 FSP and does not contain all of the pieces that would
otherwise be required for initialization.

Not currently supported:
S3 suspend/resume
CAR memory Migration (No early cbmem console)
SMM

Change-Id: I7665212c892d9a08ecf35d7be70d0afe5fd2c77b
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/6369
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 19:00:15 +02:00
..
arch IOAPIC: Fix missing stdint include 2014-07-28 17:19:54 +02:00
console src/.../Kconfig: various small fixes to texts 2014-07-23 09:07:47 +02:00
cpu cpu/intel: Add fsp version of model 406dx (Rangeley / Atom C2000) 2014-07-30 18:59:35 +02:00
device sandy/ivybridge: Native raminit. 2014-07-29 00:52:28 +02:00
drivers x230: Deploy VBT 2014-07-29 01:34:09 +02:00
ec ec/lenovo/h8: Apply ME workaround on X230 on S3 resume. 2014-07-29 01:24:28 +02:00
include sandy/ivybridge: Native raminit. 2014-07-29 00:52:28 +02:00
lib lib: Trivial - drop trailing blank lines at EOF 2014-07-08 13:52:15 +02:00
mainboard i82801ix: Allow configuration of SATA mode in CMOS. 2014-07-30 11:48:33 +02:00
northbridge northbridge/intel: Add fsp_rangeley northbridge support 2014-07-30 19:00:15 +02:00
soc src/.../Kconfig: various small fixes to texts 2014-07-23 09:07:47 +02:00
southbridge i82801ix: Allow configuration of SATA mode in CMOS. 2014-07-30 11:48:33 +02:00
superio superio/f71869ad: fix documentation of io_info mask values 2014-07-18 20:00:06 +02:00
vendorcode vendorcode/amd/agesa: Use macros already defined in stdlib.h 2014-07-18 07:20:16 +02:00
Kconfig src/.../Kconfig: various small fixes to texts 2014-07-23 09:07:47 +02:00