coreboot-kgpe-d16/src/mainboard/iei/pcisa-lx-800-r10
Patrick Georgi 29647d97c5 Align several kconfig options to match newconfig:
HT_CHAIN_UNITID_BASE
HT_CHAIN_END_UNITID_BASE
SB_HT_CHAIN_ON_BUS0
SB_HT_CHAIN_UNITID_OFFSET_ONLY
MAX_CPUS
MAX_PHYSICAL_CPUS
ROM_SIZE
TSC_X86RDTSC_CALIBRATE_WITH_TIMER2

Also hook up asus/p2b-ds

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 07:56:01 +00:00
..
cache_as_ram_auto.c coreboot used to have two different "APIs" for memory accesses: 2010-01-16 17:53:38 +00:00
chip.h Carl-Daniel's part: 2009-02-18 20:41:57 +00:00
Config.lb Move files from src/cpu/x86/{fpu,mmx,sse}/ to x86/ 2009-10-17 15:01:00 +00:00
devicetree.cb Kconfig! 2009-08-12 15:00:51 +00:00
irq_tables.c Major CONFIG_IRQ_TABLE_COUNT fixing and cleanups. Some of these boards 2009-10-07 21:51:33 +00:00
Kconfig Align several kconfig options to match newconfig: 2010-01-25 07:56:01 +00:00
mainboard.c Carl-Daniel's part: 2009-02-18 20:41:57 +00:00
Makefile.inc Add CONFIG_GENERATE_* for tables so that the user can select which tables not 2009-10-15 13:35:47 +00:00
Options.lb Fix iei/pcisa-lx-800-r10. Trivial. 2009-10-26 21:41:06 +00:00