coreboot-kgpe-d16/src/soc/intel
Rizwan Qureshi 2b1e8b3c3d intel/skylake: Add VrConfig UPD parameters from coreboot
Adding VrConfig UPDs and assign values to those from devicetree

BRANCH=none
BUG=chrome-os-partner:45387
TEST=Build and booted in kunimitsu

CQ-DEPEND=CL:310192

Change-Id: Ifce9dfacabc742b55266c48459c56c69b1f22236
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b34a3cc77afc8795abb64972f8169986c30c2acd
Original-Change-Id: Ifa960e718ed77db729f1fc4e2c00c9b305093e04
Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/311317
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12944
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2016-01-16 11:58:31 +01:00
..
baytrail ACPI: Fix IASL Warning about unused method for GBUF check 2015-12-10 16:30:50 +01:00
braswell soc/braswell: Add CPUID for D0 stepping 2016-01-14 23:09:47 +01:00
broadwell soc/intel/broadwell: Add back support for EHCI debug setup 2015-12-27 17:45:06 +01:00
common tree: drop last paragraph of GPL copyright header from new files 2016-01-13 20:35:40 +01:00
fsp_baytrail fsp_baytrail: Add additional PCI space above 4GB 2016-01-08 02:44:15 +01:00
skylake intel/skylake: Add VrConfig UPD parameters from coreboot 2016-01-16 11:58:31 +01:00