coreboot-kgpe-d16/src/southbridge/intel/i82801xx
Myles Watson 29cc9eda20 Move the v3 resource allocator to v2.
Major changes:
1. Separate resource allocation into:
	A. Read Resources
	B. Avoid fixed resources (constrain limits)
	C. Allocate resources
	D. Set resources

Usage notes:
Resources which have IORESOURCE_FIXED set in the flags constrain the placement
of other resources.  All fixed resources will end up outside (above or below) 
the allocated resources.

Domains usually start with base = 0 and limit = 2^address_bits - 1.

I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is
still there for resources.  Some platforms may want to change that, but I didn't
want to break anyone's board.

Resources are allocated in a single block for memory and another for I/O.
Currently the resource allocator doesn't support holes.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-02 18:56:24 +00:00
..
chip.h enable/disable IDE 0/1 (Primary/Secondary) interfaces on the i82801xx southbridge. 2009-05-29 13:45:22 +00:00
cmos_failover.c This patch unifies the use of config options in v2 to all start with CONFIG_ 2009-06-30 15:17:49 +00:00
Config.lb Oops forgot small part. Set up PIRQs in mainboard Config.lb for IP1000 and RM4100 instead of using the ones in i82801xx_lpc.c. 2009-05-13 02:47:14 +00:00
i82801xx.c coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3 2009-02-28 20:10:20 +00:00
i82801xx.h This patch halts the tco timer early in the boot process on all ICH series southbridges. 2008-04-06 04:26:19 +00:00
i82801xx_ac97.c ops can not be const because of the pci conf1/conf2 hackery we do. trivial 2009-05-26 12:58:00 +00:00
i82801xx_early_lpc.c Trivial, update email address. 2009-05-02 00:59:03 +00:00
i82801xx_early_smbus.c Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
i82801xx_ide.c enable/disable IDE 0/1 (Primary/Secondary) interfaces on the i82801xx southbridge. 2009-05-29 13:45:22 +00:00
i82801xx_lpc.c Move the v3 resource allocator to v2. 2009-07-02 18:56:24 +00:00
i82801xx_nic.c ops can not be const because of the pci conf1/conf2 hackery we do. trivial 2009-05-26 12:58:00 +00:00
i82801xx_pci.c Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
i82801xx_reset.c Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
i82801xx_sata.c Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
i82801xx_smbus.c ops can not be const because of the pci conf1/conf2 hackery we do. trivial 2009-05-26 12:58:00 +00:00
i82801xx_smbus.h Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
i82801xx_usb.c ops can not be const because of the pci conf1/conf2 hackery we do. trivial 2009-05-26 12:58:00 +00:00
i82801xx_usb_ehci.c Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
i82801xx_watchdog.c Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00