Kevin Chiu 314cef6600 mb/google/kahlee/variants/careena: override DRAM SPD table ... override DRAM SPD and add new 4 DRAM: Samsung (TH) K4AAG165WA-BCTD Hynix (TG) H5ANAG6NCMR-XNC Micron (TF) MT40A1G16RC-062E:B Samsung (TH) K4AAG165WA-BCWE BUG=b:139912383 BRANCH=master TEST=emerge-grunt coreboot chromeos-bootimage extract spd.bin and confirm 4 new SPD was added. Change-Id: Ie1b2c1bae5ffe9f3a6a6560348f6e1b117ffd457 Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35149 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>		2019-08-30 17:14:08 +00:00
..
acpi
arch	arm64: Rename arm_tf.c/h to bl31.c/h	2019-08-30 10:37:17 +00:00
commonlib	commonlib/region: Fix up overflow check in region_is_subregion()	2019-08-19 21:12:31 +00:00
console	Add definition for ENV_ROMSTAGE_OR_BEFORE to <rules.h>	2019-08-26 20:59:45 +00:00
cpu	arch/x86: Drop weak attribute on stage_cache	2019-08-28 22:57:17 +00:00
device	Split MAYBE_STATIC to _BSS and _NONZERO variants	2019-08-26 20:56:29 +00:00
drivers	soc/intel: Use common romstage code	2019-08-26 21:08:41 +00:00
ec	ec/google/chromeec: Add config option for eSPI	2019-08-30 10:41:24 +00:00
include	soc/intel/skylake: Remove duplicated PCI Id	2019-08-30 10:39:35 +00:00
lib	arch/x86: Simplify <arch/early_variables.h>	2019-08-26 22:52:10 +00:00
mainboard	mb/google/kahlee/variants/careena: override DRAM SPD table	2019-08-30 17:14:08 +00:00
northbridge	intel/haswell: Use smm_subregion()	2019-08-28 22:52:47 +00:00
security	Split MAYBE_STATIC to _BSS and _NONZERO variants	2019-08-26 20:56:29 +00:00
soc	ipq40xx: Increase CBFS and RAMSTAGE size	2019-08-30 10:43:42 +00:00
southbridge	amdfam10: Remove use of __PRE_RAM__	2019-08-26 02:08:42 +00:00
superio	smsc/superio/sio1007: Fix header name	2019-08-27 11:52:13 +00:00
vendorcode	vendorcode/eltan/security/lib: Always include cb_sha.c for bootblock	2019-08-26 13:46:13 +00:00
Kconfig	ACPI S3: Depend on RELOCATABLE_RAMSTAGE	2019-08-22 06:38:13 +00:00