coreboot-kgpe-d16/Documentation/mainboard/index.md
Angel Pons 31b7ee4201 treewide: Replace uses of "Nehalem"
The code in coreboot is actually for the Arrandale processors, which
are a MCM (Multi-Chip Module) with two different dies:

- Hillel:   32nm Westmere dual-core CPU
- Ironlake: 45nm northbridge with integrated graphics

This has nothing to do with the older, single-die Nehalem processors.
Therefore, replace the references to Nehalem with the correct names.

Change-Id: I8c10a2618c519d2411211b9b8f66d24f0018f908
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38942
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-15 13:04:39 +00:00

2.8 KiB

Mainboard-specific documentation

This section contains documentation about coreboot on specific mainboards.

AMD

ASRock

ASUS

Cavium

Emulation

The boards in this section are not real mainboards, but emulators.

Facebook

Foxconn

Gigabyte

Google

HP

EliteBook series

Intel

Lenovo

Libretrend

Arrandale series

GM45 series

Sandy Bridge series

Ivy Bridge series

Haswell series

MSI

Open Cellular

PC Engines

Portwell

Protectli

Roda

SiFive

Supermicro

UP