31f9631548
Use <arch/acpi.h> when appropriate. Change-Id: I05a28d2c15565c21407101e611ee1984c5411ff0 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31781 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> |
||
---|---|---|
.. | ||
acpi | ||
acpi_tables.c | ||
BiosCallOuts.c | ||
BiosCallOuts.h | ||
board_info.txt | ||
boardid.c | ||
cmos.layout | ||
devicetree.cb | ||
dsdt.asl | ||
fchec.c | ||
irq_tables.c | ||
Kconfig | ||
Kconfig.name | ||
mainboard.c | ||
Makefile.inc | ||
mptable.c | ||
OemCustomize.c | ||
README | ||
romstage.c |
coreboot is changing all the time and the patches are reabsed when pushed to community, so it is a little difficult to provide stable Bettong code. From now on, AMD provides source code which is validated by QA team. The code is pushed to github https://github.com/BTDC/coreboot The version is identified by a tag. All the changes will be pushed to coreboot community. ===== Version: TCMEF1F0 Release Date: 09/29/2015 Changes from last version: 1. Fix external graphics issue. 2. Add board ID support. 3. Support DDR4. 4. Support SD 2.0. 5. Fix Windows 7 S4 issue. 6. Add GPIO, I2C and UART support. 7. Fix the interrupt routine. 8. Restruct PCI interrupt table (C00/C01). 9. Fix DSDT issue. 10. Fix the PCIe lane map. 11. Lower the TOM to give more MMIO space. 12. Add USB device. 13. Set the USB3 port as unremoveable. 14. Update AGESA to CarrizoPI 1.1.0.1.