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coreboot-kgpe-d16/src/soc/intel
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Tan, Lean Sheng 33f8fc698c soc/intel/elkhartlake: Update FSP-M UPD related configs 
Upload the FSP-M UPD configs. This CL also updated the chip.h and
devicetree.cb with the relevant variables and configs.
This CL also updated the GPIO related settings (PMC & SD card) in
devicetree.cb.

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: If6321064b37535b390cf3dd7c41a719c598a0cd7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2021-05-30 20:15:42 +00:00
..
alderlake soc/intel/alderlake: Update soundwire master count 2021-05-26 16:08:20 +00:00
apollolake cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y 2021-05-18 16:54:21 +00:00
baytrail baytrail: Factor out INT15 handler 2021-05-20 07:58:01 +00:00
braswell cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y 2021-05-18 16:54:21 +00:00
broadwell soc/intel/broadwell: Use Lynx Point IOBP code 2021-05-20 16:04:15 +00:00
cannonlake cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y 2021-05-18 16:54:21 +00:00
common soc/intel/common: Implement TBT firmware authentication validity check 2021-05-26 15:43:21 +00:00
denverton_ns cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y 2021-05-18 16:54:21 +00:00
elkhartlake soc/intel/elkhartlake: Update FSP-M UPD related configs 2021-05-30 20:15:42 +00:00
icelake cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y 2021-05-18 16:54:21 +00:00
jasperlake util/spd_tools/lp4x: Add new memory part to to global memory definition 2021-05-22 05:42:45 +00:00
quark
skylake cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y 2021-05-18 16:54:21 +00:00
tigerlake soc/intel/tigerlake: Return TBT PowerResource from PR0 and PR3 2021-05-27 14:40:09 +00:00
xeon_sp qemu-q35,xeon_sp: Drop HAVE_SMI_HANDLER conditional with smm-class 2021-05-26 11:57:19 +00:00
Kconfig