coreboot-kgpe-d16/src/lib/Kconfig
Arthur Heymans 340e4b8090 lib/cbmem_top: Add a common cbmem_top implementation
This adds a common cbmem_top implementation to all coreboot target.

In romstage a static variable will be used to cache the result of
cbmem_top_romstage.

In ramstage if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is set a global variable
needs to be populated by the stage entry with the value passed via the
calling arguments. if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is not set the
same implementation as will be used as in romstage.

Change-Id: Ie767542ee25483acc9a56785ce20a885e9a63098
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-01 11:44:51 +00:00

76 lines
1.7 KiB
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config MISSING_BOARD_RESET
bool
help
Selected by boards that don't provide a do_board_reset()
implementation. This activates a stub that logs the missing
board reset and halts execution.
config NO_EDID_FILL_FB
bool
default y if !MAINBOARD_DO_NATIVE_VGA_INIT
help
Don't include default fill_lb_framebuffer() implementation. Select
this if your drivers uses MAINBOARD_DO_NATIVE_VGA_INIT but provides
its own fill_lb_framebuffer() implementation.
config RAMSTAGE_ADA
bool
help
Selected by features that use Ada code in ramstage.
config RAMSTAGE_LIBHWBASE
bool
select RAMSTAGE_ADA
help
Selected by features that require `libhwbase` in ramstage.
config RAMSTAGE_CBMEM_TOP_ARG
bool
help
Select this if stages run after romstage get the cbmem_top
pointer as the function arguments when called from romstage.
config FLATTENED_DEVICE_TREE
bool
help
Selected by features that require to parse and manipulate a flattened
devicetree in ramstage.
config GENERIC_SPD_BIN
bool
help
If enabled, add support for adding spd.hex files in cbfs as spd.bin
and locating it runtime to load SPD. Additionally provide provision to
fetch SPD over SMBus.
config DIMM_MAX
int
default 4
help
Total number of memory DIMM slots available on motherboard.
It is multiplication of number of channel to number of DIMMs per
channel
config DIMM_SPD_SIZE
int
default 256
help
Total SPD size that will be used for DIMM.
Ex: DDR3 256, DDR4 512.
config SPD_READ_BY_WORD
bool
if RAMSTAGE_LIBHWBASE
config HWBASE_DYNAMIC_MMIO
def_bool y
config HWBASE_DEFAULT_MMCONF
hex
default MMCONF_BASE_ADDRESS
config HWBASE_DIRECT_PCIDEV
def_bool y
endif