Furquan Shaikh 68ca21ae3d mb/intel/tglrvp: Restrict SI_ME region to lower 16MiB ... This change restricts SI_ME region to live below the 16MiB boundary to ensure that no regions cross the 16MiB boundary as the extended BIOS window checker for FMAP complains about it. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: Ib0838ff4c63b06b8dc169b40d3022965b2f2f8f9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48189 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>		2020-12-08 22:58:31 +00:00
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acpi	mb/intel/latest mainboards: Get rid of power button device in coreboot	2020-10-13 03:53:09 +00:00
spd	mb: remove duplicated Make code for spd.bin generation	2020-09-06 14:57:06 +00:00
variants	mb, soc/intel: Reorganize CNVi device entries in devicetree	2020-11-02 06:15:06 +00:00
board_id.c
board_id.h	mb/intel: Drop unneeded empty lines	2020-09-21 16:24:45 +00:00
board_info.txt
bootblock.c
chromeos.c
chromeos.fmd	mb/intel/tglrvp: Restrict SI_ME region to lower 16MiB	2020-12-08 22:58:31 +00:00
dsdt.asl	{src/mb,util/autoport}: Use macro for DSDT revision	2020-10-13 18:27:04 +00:00
ec.c	mb/intel/tglrvp: Add support for USB Type-C connector device properties	2020-07-29 09:38:38 +00:00
Kconfig	mrc_cache: Move code for triggering memory training into mrc_cache	2020-11-13 22:57:50 +00:00
Kconfig.name
mainboard.c	mb/intel/tglrvp: Add support for USB Type-C connector device properties	2020-07-29 09:38:38 +00:00
Makefile.inc	mb/intel/{jslrvp,tglrvp}: Remove non-existent 'subdirs-y += ../common'	2020-10-08 04:10:00 +00:00
romstage_fsp_params.c
smihandler.c	src: Remove extra lines in license header	2020-07-26 20:57:18 +00:00