coreboot-kgpe-d16/src
Frans Hendriks 34510c377e soc/intel/braswell/acpi/dptf/thermal.asl: Make Thermal event optional
Currently thermal event support can not be disabled at board level.
Define and dependent code are placed in same file.

Move define of HAVE_THERM_EVENT_HANDLER to mainboard file.

Change-Id: Icb532e5bc7fd171ee2921f9a4b9b2150ba9f05c5
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/27415
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-12 11:52:23 +00:00
..
acpi
arch riscv: add support to check ISA extension 2018-07-11 10:44:08 +00:00
commonlib src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:26:18 +00:00
console arch/x86: Drop leftover ROMCC console support 2018-06-08 03:31:12 +00:00
cpu src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:26:18 +00:00
device src/{device,drivers}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:27:34 +00:00
drivers src/{device,drivers}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:27:34 +00:00
ec src/{ec,include,lib}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:28:35 +00:00
include src/{ec,include,lib}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:28:35 +00:00
lib src/{ec,include,lib}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:28:35 +00:00
mainboard soc/intel/braswell/acpi/dptf/thermal.asl: Make Thermal event optional 2018-07-12 11:52:23 +00:00
northbridge src/northbridge: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:29:53 +00:00
security src: Add missing license headers 2018-07-06 15:30:59 +00:00
soc soc/intel/braswell/acpi/dptf/thermal.asl: Make Thermal event optional 2018-07-12 11:52:23 +00:00
southbridge src/sb/amd/pi/hudson/sd.c: disable SDR50 tuning and set correct clock freq in SD2.0 mode 2018-07-10 09:53:22 +00:00
superio superio: move files to match the common naming scheme 2018-07-06 16:47:21 +00:00
vendorcode cavium: Add CN81xx SoC and eval board support 2018-07-10 07:01:57 +00:00
Kconfig stage_cache: Disable when APCI S3 is not possible 2018-06-27 02:20:11 +00:00