Julius Werner 3460aa3a42 mem_chip_info: Update to new format ... The original version of the mem_chip_info structure does not record rank information and does not allow precise modeling of certain DDR configurations, so it falls short on its purpose to compile all available memory information. This patch updates the format to a new layout that remedies these issues. Since the structure was introduced so recently that no firmware using it has been finalized and shipped yet, we should be able to get away with this without accounting for backwards compatibility. BRANCH=corsola Cq-Depend: chromium:3980175 Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: If34e6857439b6f6ab225344e5b4dd0ff11d8d42a Reviewed-on: https://review.coreboot.org/c/coreboot/+/68871 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Xixi Chen <xixi.chen@mediatek.corp-partner.google.com>		2022-12-09 00:48:57 +00:00
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amd	vc/amd/fsp/cezanne/FspmUpd: don't use pointers for usb_phy configuration	2022-12-08 18:01:38 +00:00
cavium	soc/cavium/cn81xx: Use read64p()	2022-12-06 19:44:06 +00:00
example/min86	soc: Add SPDX license headers to Makefiles	2022-10-31 03:27:13 +00:00
intel	soc/intel/meteorlake: Enable LPIT support	2022-12-08 07:43:48 +00:00
mediatek	mem_chip_info: Update to new format	2022-12-09 00:48:57 +00:00
nvidia	soc/nvidia/tegra210: Fix flushing SPI fifo	2022-12-05 14:19:03 +00:00
qualcomm	mem_chip_info: Update to new format	2022-12-09 00:48:57 +00:00
rockchip	cbmem_top_chipset: Change the return value to uintptr_t	2022-11-18 16:00:45 +00:00
samsung	/: Remove extra space after comma	2022-11-30 03:07:23 +00:00
sifive/fu540	cbmem_top_chipset: Change the return value to uintptr_t	2022-11-18 16:00:45 +00:00
ti	src/soc/ti: Remove unnecessary space after casts	2022-11-22 13:42:28 +00:00
ucb/riscv	cbmem_top_chipset: Change the return value to uintptr_t	2022-11-18 16:00:45 +00:00