2.4 KiB
Portwell PQ7-M107
This page describes how to run coreboot on the Portwell PQ7-M107.
PQ7-M107 are assembled with different onboard memory modules: Rev 1.0 Onboard Samsung K4B8G1646D-MYKO memory Rev 1.1 and 1.2 Onboard Micron MT41K512M16HA-125A memory
Use 'make menuconfig' to configure onboard memory manufacture in Mainboard
menu.
Required blobs
This board currently requires: fsp blob 3rdparty/fsp/BraswellFspBinPkg/FspBin/BSWFSP.fd Microcode Intel Braswell cpuid 1046C4 version 410 (Used pre-built binary retrieved from Intel site)
Flashing coreboot
Internal programming
The main SPI flash can be accessed using flashrom.
External programming
The system has an internal flash chip which is a 8 MiB soldered SOIC-8 chip. This chip is located on the top middle side of the board. It's located between SoC and Q7 connector. Use clip (or solder wires) to program the chip. Specifically, it's a Winbond W25Q64FW (1.8V), whose datasheet can be found here.
Known issues
- The PQ7 module contains Q7 connector only. Depending on the carrier serial/video/pcie ports might be available.
Untested
- hardware monitor
- SDIO
- Full Embedded Controller support
Working (using carrier)
- USB
- Gigabit Ethernet
- integrated graphics
- flashrom
- external graphics
- PCIe
- eMMC
- SATA
- serial port
- SMbus
- HDA (codec on carrier)
- initialization with FSP MR2
- SeaBIOS payload (version rel-1.11.0-44-g7961917)
- Embedded Linux (Ubuntu 4.15+)
Technology
+------------------+--------------------------------------------------+
| SoC | Intel Atom Processor N3710 |
+------------------+--------------------------------------------------+
| CPU | Intel Braswell (N3710) |
+------------------+--------------------------------------------------+
| Super I/O, EC | ITE8256 |
+------------------+--------------------------------------------------+
| Coprocessor | Intel Management Engine |
+------------------+--------------------------------------------------+