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coreboot-kgpe-d16/src/southbridge/intel/bd82x6x
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Vladimir Serbinenko 35c0f439fc Move nehalem/sandy/ivy to per-device acpi 
Change-Id: I3d664ab575bf9c49a7bff9a395fbab96748430d0
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6802
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
2014-09-11 21:53:33 +02:00
..
acpi Move nehalem/sandy/ivy to per-device acpi 2014-09-11 21:53:33 +02:00
azalia.c southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
bootblock.c x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
chip.h ibexpeak / bd82x6x: Make SATA mode user-visible option. 2014-01-12 18:03:23 +01:00
early_me.c x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
early_me_native.c sandy/ivybridge: Native raminit (lint clean) 2014-07-29 01:23:10 +02:00
early_pch.c timestamps intel: Move timestamp scratchpad to chipset 2013-09-21 06:20:02 +02:00
early_pch_native.c sandy/ivybridge: Native raminit. 2014-07-29 00:52:28 +02:00
early_smbus.c southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
early_spi.c x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
early_thermal.c sandy/ivybridge: Native raminit. 2014-07-29 00:52:28 +02:00
early_usb.c bd82x6x: Fix early USB BAR programming (finally?) 2013-06-25 18:50:55 +02:00
elog.c intel boards: Use acpi_is_wakeup_s3() 2014-06-21 08:04:52 +02:00
finalize.c intel/sandybridge intel/bd82x6x: remove explicit pcie config accesses 2013-08-09 23:20:52 +02:00
gpio.c x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
gpio.h Provide functions to access arbitrary GPIO pins and vectors 2012-05-30 00:53:19 +02:00
Kconfig Move nehalem/sandy/ivy to per-device acpi 2014-09-11 21:53:33 +02:00
lpc.c Move nehalem/sandy/ivy to per-device acpi 2014-09-11 21:53:33 +02:00
Makefile.inc sandybridge: Add native sandybridge 2014-08-30 18:59:23 +02:00
me.c intel boards: Use acpi_is_wakeup_s3() 2014-06-21 08:04:52 +02:00
me.h Cougar/Panther Point: Compile in ME7 and ME8 code at the same time 2012-07-24 23:17:17 +02:00
me_8.x.c southbridge/intel/bd82x6x/me_8.x.c: Trivial - space to tab fix 2014-07-15 15:42:35 +02:00
me_status.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
nvs.h Move nehalem/sandy/ivy to per-device acpi 2014-09-11 21:53:33 +02:00
pch.c x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
pch.h sandy/ivybridge: Native raminit. 2014-07-29 00:52:28 +02:00
pci.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
pcie.c intel/sandybridge intel/bd82x6x: remove explicit pcie config accesses 2013-08-09 23:20:52 +02:00
reset.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
sata.c southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
smbus.c bd82x6x: Add smbus_write_byte 2014-02-01 18:41:24 +01:00
smbus.h southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
smi.c sandy/ivybridge: Native raminit. 2014-07-29 00:52:28 +02:00
smihandler.c bd82x6x/ibexpeak: Make DRAM reset gate GPIO configurable 2014-01-09 17:16:12 +01:00
usb_ehci.c sandybridge: Add native sandybridge 2014-08-30 18:59:23 +02:00
usb_xhci.c usbdebug: Move under drivers/usb 2014-02-06 11:13:57 +01:00
watchdog.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00