4ee4bd5bb0
This patch aligns broadwell to the new SoC header include scheme. BUG=None TEST=Tested with whole series. Compiled Auron and Samus. Change-Id: I0cb6aa3d17ce28890e586be1c2c7ad16d91dd925 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 23bcaa8110c4b63999c6ebf370045e9bef87ce6e Original-Change-Id: I613ec0e2b970c75d1f8f7d9bb454bcf11abc78f0 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224507 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9364 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@google.com>
128 lines
3.1 KiB
C
128 lines
3.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2009 coresystems GmbH
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* Copyright (C) 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <arch/io.h>
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#include <delay.h>
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#include <stdlib.h>
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#include <soc/intel/common/hda_verb.h>
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#include <soc/ramstage.h>
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static const u32 minihd_verb_table[] = {
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/* coreboot specific header */
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0x80862807, // Codec Vendor / Device ID: Intel Mini-HD
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0x00000000, // Subsystem ID
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0x00000004, // Number of jacks
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/* Enable 3rd Pin and Converter Widget */
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0x00878101,
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/* Pin Widget 5 - PORT B */
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0x00571C10,
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0x00571D00,
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0x00571E56,
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0x00571F18,
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/* Pin Widget 6 - PORT C */
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0x00671C20,
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0x00671D00,
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0x00671E56,
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0x00671F18,
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/* Pin Widget 7 - PORT D */
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0x00771C30,
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0x00771D00,
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0x00771E56,
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0x00771F18,
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/* Disable 3rd Pin and Converter Widget */
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0x00878100,
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/* Dummy entries to fill out the table */
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0x00878100,
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0x00878100,
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};
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static void minihd_init(struct device *dev)
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{
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struct resource *res;
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u8 *base, reg32;
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int codec_mask, i;
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/* Find base address */
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (!res)
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return;
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base = res2mmio(res, 0, 0);
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printk(BIOS_DEBUG, "Mini-HD: base = %p\n", base);
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/* Set Bus Master */
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reg32 = pci_read_config32(dev, PCI_COMMAND);
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pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
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/* Mini-HD configuration */
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reg32 = read32(base + 0x100c);
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reg32 &= 0xfffc0000;
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reg32 |= 0x4;
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write32(base + 0x100c, reg32);
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reg32 = read32(base + 0x1010);
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reg32 &= 0xfffc0000;
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reg32 |= 0x4b;
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write32(base + 0x1010, reg32);
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/* Init the codec and write the verb table */
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codec_mask = hda_codec_detect(base);
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if (codec_mask) {
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for (i = 3; i >= 0; i--) {
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if (codec_mask & (1 << i))
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hda_codec_init(base, i,
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sizeof(minihd_verb_table),
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minihd_verb_table);
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}
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}
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}
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static struct device_operations minihd_ops = {
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.read_resources = &pci_dev_read_resources,
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.set_resources = &pci_dev_set_resources,
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.enable_resources = &pci_dev_enable_resources,
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.init = &minihd_init,
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.ops_pci = &broadwell_pci_ops,
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};
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static const unsigned short pci_device_ids[] = {
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0x0a0c, /* Haswell */
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0x160c, /* Broadwell */
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0
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};
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static const struct pci_driver minihd_driver __pci_driver = {
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.ops = &minihd_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = pci_device_ids,
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};
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