coreboot-kgpe-d16/src/soc
Marshall Dawson 36a2356fb1 amd/stoneyridge: Refactor SMI handler
Rewrite the handler to be more compact and extendable.  The old
functionality is duplicated after the rewrite.  All SMI source registers
(except for SmiSciStatus) behave identically so these are consolidated.
Register 0x80 contains sources 0-31, 0x81 sources 32-63, and so on.

Create a table of mini-handlers to be supported in the soc directory.
As SMI sources are discovered, attempt to find the corresponding handler
and then execute it.

Change-Id: Ic7050ecf65c2af036fe297f429a0bbdc709ad4c1
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21746
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2017-10-02 22:30:57 +00:00
..
amd amd/stoneyridge: Refactor SMI handler 2017-10-02 22:30:57 +00:00
broadcom/cygnus mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
dmp/vortex86ex soc/dmp/vortex86: Fix CMOS read and random RTC reset 2017-08-01 13:20:15 +00:00
imgtec/pistachio mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
intel soc/intel/braswell/acpi: Clean OpRegion up 2017-09-30 01:24:47 +00:00
lowrisc/lowrisc soc/lowrisc: Place CBMEM at top of autodetected RAM 2016-12-06 18:51:13 +01:00
marvell/mvmap2315 Update files with no newline at the end 2017-07-24 15:08:16 +00:00
mediatek/mt8173 mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
nvidia mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
qualcomm mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
rockchip include/device: Split i2c.h into three 2017-08-18 15:33:29 +00:00
samsung mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
ucb/riscv soc/ucb/riscv: Place CBMEM at top of autodetected RAM 2016-12-06 18:48:28 +01:00