coreboot-kgpe-d16/src/soc/intel/skylake
Duncan Laurie 372b67e22b skylake: dptf: Add TSR3 thermal sensor and CPU code cleanup
- glados has more thermal sensors that could be used so add
another entry in the DTPF thermal sensor ACPI code.
- fix indentation block in cpu.asl.
- declare \_SB.MPDL as external (it is already CondRefOf)
so it does not need to be present in mainboard config if
the mainboard does not want to override the default.

BUG=chrome-os-partner:44622
BRANCH=none
TEST=emerge-glados coreboot

Change-Id: I1afe7013a24ee1215f5e968e25594f746bbdd17c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8d357437d06349039a94869b088c3c50b32933c0
Original-Change-Id: Ie87d52e735bf930a003e525cf1918789920922a5
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297335
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11558
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-09-09 20:19:12 +00:00
..
acpi skylake: dptf: Add TSR3 thermal sensor and CPU code cleanup 2015-09-09 20:19:12 +00:00
bootblock x86: bootblock: remove linking and program flow from build system 2015-09-09 03:22:58 +00:00
include/soc skylake: Remove dead code 2015-09-08 11:30:28 +00:00
microcode microcode: Unify rules to add microcode to CBFS once again 2015-09-07 23:51:30 +00:00
romstage Skylake:Set DISB inside romstage after mrc init 2015-09-08 11:35:37 +00:00
acpi.c skylake: provide clarification for FADT gpe0_blk_len 2015-08-14 15:20:57 +02:00
chip.c skylake: Apply USB2 and USB3 port enable/disable settings 2015-09-08 11:31:13 +00:00
chip.h skylake: Clean up chip.h 2015-09-08 11:33:57 +00:00
cpu.c skylake: only generate ACPI cpu entries once 2015-08-27 14:20:25 +00:00
cpu_info.c
elog.c skylake: align power management names with hardware 2015-07-29 19:31:07 +02:00
finalize.c
flash_controller.c skylake: refactor flash_controller code 2015-09-08 11:30:11 +00:00
gpio.c intel/skylake: mask off txstate before setting new gpio value 2015-08-29 07:16:59 +00:00
igd.c skylake: igd: clean up igd.c 2015-09-08 11:48:21 +00:00
Kconfig x86: bootblock: remove linking and program flow from build system 2015-09-09 03:22:58 +00:00
lpc.c skylake: correct IO-APIC redirection entry count 2015-08-19 14:04:08 +00:00
Makefile.inc x86: bootblock: remove linking and program flow from build system 2015-09-09 03:22:58 +00:00
memmap.c Skylake: update cbmem_top 2015-08-19 14:04:31 +00:00
monotonic_timer.c skylake: allow timer_monotonic_get() in all stages 2015-09-08 11:22:24 +00:00
pch.c
pcie.c
pcr.c skylake: provide pcr helper to get a port's register space 2015-07-29 19:30:49 +02:00
pei_data.c intel/skylake: Fix RMT disable of saved training data 2015-08-29 07:18:49 +00:00
pmc.c Skylake:Set DISB inside romstage after mrc init 2015-09-08 11:35:37 +00:00
pmutil.c skylake: fix SMI GPI status handling 2015-08-14 15:21:16 +02:00
ramstage.c
smbus.c
smbus_common.c
smi.c
smihandler.c skylake: fix SMI GPI status handling 2015-08-14 15:21:16 +02:00
smmrelocate.c Skylake: update cbmem_top 2015-08-19 14:04:31 +00:00
systemagent.c Skylake: update cbmem_top 2015-08-19 14:04:31 +00:00
tsc_freq.c
uart.c skylake: fix serial port with new code base 2015-08-13 16:33:53 +02:00
uart_debug.c skylake: fix serial port with new code base 2015-08-13 16:33:53 +02:00
xhci.c