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coreboot-kgpe-d16/src/mainboard/google/veyron_rialto
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Patrick Georgi f0a97bf75e google/veyron: Fix building with CHROMEOS enabled 
romstage requires some button accessor functions for the Chrome OS boot flow.

Change-Id: I3f90d66b103e0610931c183dd5f5679ca6f910f6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10697
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-06-30 08:17:52 +02:00
..
sdram_inf veyron: The ODT function is disabled for LPDDR3 2015-04-21 08:19:00 +02:00
board.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
boardid.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
bootblock.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
chromeos.c Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
devicetree.cb Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
Kconfig rockchip/rk3288: complete vboot configuration and move to SoC 2015-06-26 23:30:39 +02:00
Kconfig.name kconfig: automatically include mainboards 2015-04-18 08:31:08 +02:00
mainboard.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
Makefile.inc google/veyron: Fix building with CHROMEOS enabled 2015-06-30 08:17:52 +02:00
memlayout.ld
reset.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
romstage.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
sdram_configs.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00