Felix Held 37e160efb5 soc/intel/baytrail: use mp_cpu_bus_init ... Implement mp_init_cpus and use mp_cpu_bus_init as init function in cpu_bus_ops. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I057ae8d95bdc510e9e7afb144b692531107fa45d Reviewed-on: https://review.coreboot.org/c/coreboot/+/58506 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2021-10-22 01:27:48 +00:00
..
acpi	{sb,soc}/intel: Drop unused globalnvs.asl methods	2021-09-29 10:04:44 +00:00
bootblock
include/soc	soc/intel/baytrail: use mp_cpu_bus_init	2021-10-22 01:27:48 +00:00
romstage
acpi.c	acpi/acpigen: Constify CST functions' pointers	2021-10-19 14:57:39 +00:00
chip.c	soc/intel/baytrail: use mp_cpu_bus_init	2021-10-22 01:27:48 +00:00
chip.h
cpu.c	soc/intel/baytrail: use mp_cpu_bus_init	2021-10-22 01:27:48 +00:00
dptf.c
ehci.c
elog.c
emmc.c
fadt.c	soc/intel: drop P_BLK support	2021-10-13 18:05:05 +00:00
gfx.c
gpio.c
hda.c
int15.c
iosf.c
Kconfig	src/soc to src/superio: Fix spelling errors	2021-10-05 18:07:08 +00:00
lpe.c
lpss.c
Makefile.inc	soc/intel/baytrail: Always handle MRC as ELF file	2021-09-28 15:09:01 +00:00
memmap.c
modphy_table.c
northcluster.c
pcie.c
perf_power.c
placeholders.c
pmutil.c
ramstage.c
refcode.c
refcode_native.c
sata.c
scc.c
sd.c
smihandler.c
smm.c
southcluster.c
tsc_freq.c
xhci.c