Frank Vibrans 39fca80b00 This code provides cpu northbridge initialization for Family 14h cpus. It is dependent on the AMD Agesa code. ... Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2011-02-14 18:35:15 +00:00
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amd	This code provides cpu northbridge initialization for Family 14h cpus. It is dependent on the AMD Agesa code.	2011-02-14 18:35:15 +00:00
intel	SMM code on i945 platforms needs udelay()	2011-01-27 11:09:36 +00:00
via	__PRE_RAM__ is defined by the makefile	2010-12-27 13:30:39 +00:00
Kconfig	Drop remainders of PPC port	2009-10-28 19:40:46 +00:00
Makefile.inc	Drop remainders of PPC port	2009-10-28 19:40:46 +00:00