86b1b6811c
List of changes: 1. Make the FSP notify phases name prior in comments section. 2. Fix discrepancies in FSP notify before and after postcode comments. 3. Add FSP notify postcode macros for after pci enumeration(0xa2) and ready to boot(0xa3) call. Change-Id: Ib4c825d5f1f31f80ad2a03ff5d6006daa7104d23 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52894 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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cbmem_console.h | ||
console.h | ||
debug.h | ||
flash.h | ||
ne2k.h | ||
post_codes.h | ||
qemu_debugcon.h | ||
spi.h | ||
spkmodem.h | ||
streams.h | ||
system76_ec.h | ||
uart.h | ||
usb.h | ||
vtxprintf.h |