Johnny Lin 91c8ccd99e xeon_sp/cpx: Fix get_system_memory_map to return the correct address ... Similar to commit b45ed65, the HOB structure is actually a 8 byte address pointing to the HOB data. Tested=Verified the values of the hob fields are the same printed by soc_display_memmap_hob(). Change-Id: I348d3cd80a56e86d22f20fcadf0316b462b86829 Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44502 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2020-08-18 08:50:00 +00:00
..
acpi	src/acpi: Add missing <{stdbool,stdint}.h>	2020-07-29 09:37:10 +00:00
arch	arch/x86/exit_car.S: Make sure _cbmem_top_ptr hits dram	2020-08-17 06:22:41 +00:00
commonlib
console
cpu	cpu/x86/smm/smm_stub: Add x86_64 support	2020-08-18 08:49:57 +00:00
device	{sb/intel/*/azalia.c,device/azalia_device.c}: Reduce differences	2020-08-17 06:58:45 +00:00
drivers	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	2020-08-17 07:00:37 +00:00
ec	ec/google/chromeec: Add helper to request AP reset	2020-08-14 08:35:15 +00:00
include	cpu/x86/smm/smm_stub: Add x86_64 support	2020-08-18 08:49:57 +00:00
lib	lib/imd_cbmem.c: Add a helper function to indicate that cbmem is ready	2020-08-17 06:22:58 +00:00
mainboard	mb/purism/librem_whl: Add new board Librem Mini (WHL-U)	2020-08-18 08:48:18 +00:00
northbridge	nb/amd/agesa: read 256 bytes to SPD buffer instead of 128	2020-08-17 07:13:05 +00:00
security	security/vboot/Makefile.inc: Update regions-for-file function	2020-08-13 05:43:53 +00:00
soc	xeon_sp/cpx: Fix get_system_memory_map to return the correct address	2020-08-18 08:50:00 +00:00
southbridge	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	2020-08-17 07:00:37 +00:00
superio	superio/ite/it8728f: Correct Kconfig selections	2020-08-14 00:51:37 +00:00
vendorcode	vc/amd/agesa/f15tn: add 933 MHz to GfxMemClockFrequencyDefinitionTable	2020-08-17 07:14:03 +00:00
Kconfig