Felix Held 3c4fd70d61 soc/amd/cezanne/smihandler: add missing southbridge_io_trap_handler ... Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4140fbf93e84a2620ffb88e5c65df17b23135553 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50465 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-02-11 02:47:49 +00:00
..
include/soc	soc/amd/cezanne/fch: add HAVE_SMI_HANDLER case to fch_init_acpi_ports	2021-02-10 23:25:21 +00:00
aoac.c	soc/amd/cezanne: add AOAC support	2021-01-14 15:42:34 +00:00
bootblock.c	soc/amd/cezanne: add caching setup in bootblock	2020-12-13 22:18:03 +00:00
chip.c	soc/amd/cezanne/chip: add empty set_mmio_dev_ops	2021-02-10 16:09:32 +00:00
chip.h	soc/amd/cezanne: add config.c and minimal chip.h	2020-12-06 19:05:47 +00:00
chipset.cb	soc/amd/cezzane: Add a minimal chipset tree	2021-01-11 07:42:12 +00:00
config.c	soc/amd/cezanne: add config.c and minimal chip.h	2020-12-06 19:05:47 +00:00
cpu.c	soc/amd/cezanne: add empty CPU driver	2021-02-09 20:46:50 +00:00
early_fch.c	soc/amd/cezanne: Enable early LPC support in bootblock stage	2021-02-09 20:41:03 +00:00
fch.c	soc/amd/cezanne/fch: add HAVE_SMI_HANDLER case to fch_init_acpi_ports	2021-02-10 23:25:21 +00:00
fsp_params.c	soc,vendorcode/amd/cezanne: add basic FSP integration	2021-01-24 18:15:46 +00:00
fw.cfg	amdfwtool:cezanne: Add entry of PSP_BOOTLOADER_AB (0x73)	2021-02-03 13:48:51 +00:00
gpio.c	soc/amd: Move soc_route_sci to common/blocks/smi/smi_util	2021-02-10 01:31:28 +00:00
Kconfig	soc/amd: factor out common SMM relocation code	2021-02-11 01:44:24 +00:00
Makefile.inc	soc/amd: include cpu/x86/smm directory in common SMM Makefile	2021-02-11 02:46:41 +00:00
pcie_gpp.c	soc/amd/cezanne/pcie_gpp: scan internal PCI buses	2021-02-07 17:48:59 +00:00
reset.c	soc/amd/cezanne: add 0xcf9 reset	2020-12-11 17:44:42 +00:00
romstage.c	soc/amd/cezanne/romstage: Store early dram region	2021-02-07 18:08:07 +00:00
root_complex.c	soc/amd/cezanne: Add root_complex	2021-02-09 21:29:59 +00:00
smihandler.c	soc/amd/cezanne/smihandler: add missing southbridge_io_trap_handler	2021-02-11 02:47:49 +00:00
uart.c	soc/amd/cezanne,picasso/uart: remove unneeded struct name	2021-01-15 01:19:59 +00:00