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coreboot-kgpe-d16/src/soc/intel/fsp_broadwell_de
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Kyösti Mälkki 3d15e10aef MMCONF_SUPPORT: Flip default to enabled 
Also remove separate MMCONF_SUPPORT_DEFAULT flag.

Change-Id: Idf1accdb93843a8fe2ee9c09fb984968652476e0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17694
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-07 13:00:31 +01:00
..
acpi Remove non-ascii & unprintable characters 2016-08-01 21:44:45 +02:00
bootblock
fsp intel/fsp_broadwell_de: fix SPD CBFS file type 2016-04-20 23:37:29 +02:00
include/soc fsp_broadwell_de: Add Kconfig switch for SERIRQ operation mode 2016-09-13 16:52:53 +02:00
romstage lib: put romstage_handoff implementation in own compilation unit 2016-12-01 08:16:47 +01:00
acpi.c fsp_Broadwell_DE: Do not set IRQ3 and IRQ4 to level 2016-08-11 15:16:40 +02:00
chip.c soc/intel/fsp_broadwell_de: Remove the enforced fsp1.0 APIs call sequence 2016-10-09 19:07:58 +02:00
chip.h
cpu.c src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-07-31 19:27:53 +02:00
Kconfig MMCONF_SUPPORT: Flip default to enabled 2016-12-07 13:00:31 +01:00
Makefile.inc soc/intel/fsp_broadwell_de/uart: Drop it 2016-09-30 18:18:01 +02:00
memmap.c
northcluster.c fsp_broadwell_de: Add DMAR table to ACPI 2016-08-03 12:44:25 +02:00
ramstage.c
reset.c
smbus.c fsp_broadwell_de: Add SMBus driver for ramstage 2016-07-14 07:03:40 +02:00
smbus_common.c fsp_broadwell_de: Add SMBus driver for ramstage 2016-07-14 07:03:40 +02:00
southcluster.c fsp_broadwell_de: Add Kconfig switch for SERIRQ operation mode 2016-09-13 16:52:53 +02:00
spi.c spi: Define and use spi_ctrlr structure 2016-12-05 03:29:04 +01:00