Felix Singer 3de90d1344 soc/intel/cnl: Set Heci1Disable depending on devicetree config ... Currently HECI1 gets enabled by the option HeciEnabled, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement/disablement of the HECI1 device. All corresponding mainboards were checked if the devicetree matches the HeciEnabled setting, and adjusted where necessary. Change-Id: I03dd3577fbe3f68b0abc2d196d016a4d26d88ce5 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner		2020-08-07 20:35:29 +00:00
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amd	soc/amd/picasso/acpi: remove AOAC device enables from global NVS	2020-08-07 17:40:01 +00:00
cavium	src: Remove unused 'include <types.h>'	2020-07-14 16:10:17 +00:00
intel	soc/intel/cnl: Set Heci1Disable depending on devicetree config	2020-08-07 20:35:29 +00:00
mediatek	soc/mediatek/mt8183: Set MMU default map length to 8GB befor mem init	2020-08-06 03:03:53 +00:00
nvidia	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
qualcomm	qualcomm/sc7180: Fix TLMM assignments for GPIOs 29, 31 and 32	2020-08-03 05:13:07 +00:00
rockchip	src/soc/rockchip: Add missing <{stddef,stdint}.h>	2020-07-29 09:37:22 +00:00
samsung	src/soc/samsung/exynos{5250,s5420}: Add missing <{stddef,stdint}.h>	2020-07-29 09:34:55 +00:00
sifive	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	2020-06-13 06:49:23 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00