coreboot-kgpe-d16/src
Sumeet Pawnikar 3f689ca24a mb/google/sarien: Replace B0D4 with TCPU
Replace B0D4 with TCPU for DPTF thermal sensor. This helps to
maintain consistency between coreboot and UEFI BIOS.

Change-Id: I024068c19160e1c08badef3d304ada14455c045f
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/31028
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-23 17:28:38 +00:00
..
acpi
arch riscv: create Kconfig architecture features for new parts 2019-01-17 04:59:09 +00:00
commonlib buildsystem: Promote rules.h to default include 2019-01-16 11:51:07 +00:00
console console/init: Print log level in coreboot banner 2019-01-17 13:19:53 +00:00
cpu nb/intel/pineview: Use parallel MP init 2019-01-23 14:49:57 +00:00
device device/pci_device: Do not break tree topology 2019-01-10 12:47:18 +00:00
drivers src/drivers: Remove needless '&' on function pointers 2019-01-23 14:43:49 +00:00
ec ec/chromeec: fix LPC read/write for MEC devices 2018-12-28 12:24:52 +00:00
include lib/boot_device: Add API for write protect a region 2019-01-21 13:25:46 +00:00
lib lib/boot_device: Add API for write protect a region 2019-01-21 13:25:46 +00:00
mainboard mb/google/sarien: Replace B0D4 with TCPU 2019-01-23 17:28:38 +00:00
northbridge i945,ICH7: Write on RPFN only once 2019-01-23 14:57:27 +00:00
security tss/tcg-2.0: remove unnecessary break from marshaling code 2019-01-17 13:19:47 +00:00
soc soc/intel/cannonlake: Replace device name B0D4 with TCPU 2019-01-23 16:42:45 +00:00
southbridge nb/intel/pineview: Use parallel MP init 2019-01-23 14:49:57 +00:00
superio superio/nsc: fix IO masks 2019-01-17 14:52:17 +00:00
vendorcode vendorcode/{amd,cavium,intel}: Remove trailing whitespace 2019-01-17 14:52:33 +00:00
Kconfig [RFC]util/checklist: Remove this functionality 2019-01-14 19:42:59 +00:00