Felix Held 3fe1ad1f26 soc/amd/stoneyridge/reset: use port and bit defines from cf9_reset.h ... The register name and the name of one bit are slightly different, but have the same functionality. Change-Id: Ie49975bb43868cbb2dc986e66dc5b7291e70222f Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48507 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-12-10 16:00:55 +00:00
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cezanne	soc/amd/cezanne: print APU family and model in bootblock_soc_init	2020-12-09 18:44:51 +00:00
common	soc/amd: Remove Kconfig BOOTBLOCK_ADDR	2020-12-09 14:23:43 +00:00
picasso	soc/amd/picasso/reset: use port and bit defines from cf9_reset.h	2020-12-10 01:22:06 +00:00
stoneyridge	soc/amd/stoneyridge/reset: use port and bit defines from cf9_reset.h	2020-12-10 16:00:55 +00:00
Kconfig	soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig	2020-11-19 14:29:14 +00:00