coreboot-kgpe-d16/src/northbridge/intel/haswell
Tristan Corrick 3ffbc7c8e2 nb/intel/haswell: Add a PCI ID for a Mini-HD audio controller
The PCI ID was taken from the output of `lspci` on an ASRock H81M-HDS.

Change-Id: I3679d1ab0ae08726bff04c5985d6d93437b2fb81
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/29379
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-11-01 22:21:19 +00:00
..
acpi
acpi.c arch/x86/acpi: Add DMAR RMRR helper functions 2018-06-30 09:02:56 +00:00
bootblock.c src/northbridge: Add and update license headers 2018-05-29 22:36:37 +00:00
chip.h
early_init.c nb/intel/haswell;sb/intel/lynxpoint: Enable VT-d and X2APIC 2018-03-08 19:14:17 +00:00
finalize.c pci: Move inline PCI functions to pci_ops.h 2018-04-20 13:03:54 +00:00
gma.c northbridge: Use 'unsigned int' to bare use of 'unsigned' 2018-09-25 14:12:43 +00:00
haswell.h nb/intel/haswell: Add a PCI ID for a desktop memory controller 2018-11-01 22:17:40 +00:00
Kconfig cpu/intel/haswell: Use the common intel romstage_main function 2018-06-14 10:01:35 +00:00
Makefile.inc cpu/intel/haswell: Switch to POSTCAR_STAGE 2018-06-05 07:59:22 +00:00
minihd.c nb/intel/haswell: Add a PCI ID for a Mini-HD audio controller 2018-11-01 22:21:19 +00:00
northbridge.c nb/intel/haswell: Add a PCI ID for a desktop memory controller 2018-11-01 22:17:40 +00:00
pei_data.h src: Add missing include <stdint.h> 2018-11-01 11:25:07 +00:00
ram_calc.c
raminit.c src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
raminit.h
report_platform.c src: Replace MSR addresses with macros 2018-10-11 21:05:07 +00:00